Neural networks present a fundamentally different model of computation fromthe conventional sequential digital model. Dedicated hardware may thus be moresuitable for executing them. Given that there is no clear consensus on the modelof computation in the brain, model flexibility is at least as important a characteristicof neural hardware as is performance acceleration. The SpiNNaker chip is anexample of the emerging "neuromimetic" architecture, a universal platform thatspecialises the hardware for neural networks but allows flexibility in model choice.It integrates four key attributes: native parallelism, event-driven processing, incoherentmemory and incremental reconfiguration, in a system combining an arrayof general-purpose processors with a configurable asynchronous interconnect.Making such a device usable in practice requires an environment for instantiatingneural models on the chip that allows the user to focus on model characteristicsrather than on hardware details. The central part of this system is a library ofpredesigned, "drop-in" event-driven neural components that specify their specificimplementation on SpiNNaker. Three exemplar models: two spiking networksand a multilayer perceptron network, illustrate techniques that provide a basisfor the library and demonstrate a reference methodology that can be extended tosupport third-party library components not only on SpiNNaker but on any configurableneuromimetic platform. Experiments demonstrate the capability of thelibrary model to implement efficient on-chip neural networks, but also reveal importanthardware limitations, particularly with respect to communications, thatrequire careful design.The ultimate goal is the creation of a library-based development system thatallows neural modellers to work in the high-level environment of their choice, usingan automated tool chain to create the appropriate SpiNNaker instantiation. Sucha system would enable the use of the hardware to explore abstractions of biologicalneurodynamics that underpin a functional model of neural computation.