Initial research in the field of organic electronics focused primarily on the improvements in material performance. Significant progress has been achieved in the case of organic field effect transistors, where reported mobility values are now over 5 orders of magnitude higher than those of early devices. As a consequence, the use of organic transistors is now being considered for real-world applications in the form of integrated logic circuits. This in turn presents many new challenges, as the logic circuit requirements are more demanding on the transistor characteristics and corresponding fabrication processes.This thesis investigates the feasibility of organic technology for its potential use in future low-cost, high-volume electronic applications. The research objectives were accomplished by practical evaluation of an organic logic circuit fabrication process. First, recent advances in the fabrication of organic circuits in terms of transistor structure, material usage and fabrication techniques are reviewed. Next, a lithographic logic circuit fabrication process using PVP gate dielectric and TIPS-pentacene organic semiconductor adapted from state of the art fabrication process is presented. The logic circuit design decisions and the methodology for the fabrication process are thoroughly documented. Using this process, zero-Vgs and diode-load inverter circuits were successfully fabricated. However, the process is in need of further refinement for more complex circuit designs, as the fabrication of a comparator circuit consisting of 11 transistors was unsuccessful.Two optimisation techniques that are compatible with the logic circuit fabrication process were also explored in this work. To improve the capacitive coupling of the dielectric layer, the use of a polymer nanocomposite dielectric was investigated. The nanocomposite is prepared by blending PVP solution with a high-k inorganic nanoparticle filler, barium strontium titanate. Using the nanocomposite dielectric, both single transistors and integrated logic circuits were successfully fabricated. This is the first report on the use of PVP and barium strontium titanate nanocomposite dielectric with a lithographic based logic circuit fabrication process. The use of PFBT modified Au contacts for the fabrication process was investigated to improve theperformance of the contact electrode layer. Using PFBT, mobility increased by one order of magnitude over untreated Au electrodes for the PVP and TIPS-pentacene transistors.