Prof Piotr Dudek

Professor of Circuits and Systems

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Publications

  1. 2016
  2. Published

    Vision Chips with In-pixel Processors for High-performance Low-power Embedded Vision Systems

    Martel, J. N. P. & Dudek, P., 12 Mar 2016, Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), International Symposium on Code Generation and Optimization, CGO'16. Barcelona, Spain, 3 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  3. 2015
  4. Published

    Practical Gradient-Descent for Memristive Crossbars

    Nair, M. V. & Dudek, P., Nov 2015, International Conference on Memristive Systems, MEMRISYS 2015. IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  5. Published

    Pixel interlacing to trade off the resolution of a Cellular Processor Array against more registers

    Martel, J. N. P., Chau, M., Cook, M. & Dudek, P., Sep 2015, European Conference on Circuit Theory and Design, ECCTD 2015. IEEE, 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. Published

    Gradient-descent-based learning in memristive crossbar arrays

    Nair, M. V. & Dudek, P., Jul 2015, International Joint Conference on Neural Networks, IJCNN 2015 . IEEE, 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  7. Published

    An event-driven massively parallel fine-grained processor array

    Walsh, D. & Dudek, P., Jun 2015, IEEE International Symposium on Circuits and Systems, ISCAS 2015. IEEE, p. 1346-1349

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  8. Published

    Trigger-Wave Asynchronous Cellular Logic Array for Fast Binary Image Processing

    Mroszczyk, P. & Dudek, P., Feb 2015, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 62, 2, p. 497-506

    Research output: Contribution to journalArticle

  9. Published

    Toward joint approximate inference of visual quantities on cellular processor arrays

    Martel, J. N. P., Chau, M., Dudek, P. & Cook, M., 2015, IEEE International Symposium on Circuits and Systems, ISCAS 2015. IEEE, p. 2061-2064

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  10. 2014
  11. Published

    Tunable CMOS Delay Gate With Improved Matching Properties

    Mroszczyk, P. & Dudek, P., Apr 2014, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 61, 9, p. 2586-2595

    Research output: Contribution to journalArticle

  12. Published

    A fast self-tuning background subtraction algorithm

    Wang, B. & Dudek, P., 2014, IEEE Conference on Computer Vision and Pattern Recognition Workshops, CVPRW 2014. p. 401-404

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  13. Published

    A new method for fast skeletonization of binary images on cellular processor arrays

    Wang, B., Mroszczyk, P. & Dudek, P., 2014, 14th International Workshop on Cellular Nanoscale Networks and their Applications, CNNA 2014. IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Research output: Contribution to journalArticle

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Research output: Chapter in Book/Report/Conference proceedingConference contribution