Prof Piotr Dudek

Professor of Circuits and Systems

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Publications

  1. Published

    A 100,000 fps Vision Sensor with Embedded 535 GOPS/W 256x256 SIMD Processor Array

    Carey, S. J., Lopich, A., Barr, D. R. W., Wang, B. & Dudek, P., Jun 2013, 2013 Symposium on VLSI Circuits. IEEE, p. 182-183

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  2. Published

    A compact FPGA implementation of a bit-serial SIMD cellular processor array

    Walsh, D. & Dudek, P., 2012, International Workshop on Cellular Nanoscale Networks and their Applications|Int. Workshop Cell. Nanoscale Netw. Appl..

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  3. Published

    A demonstration of tracking using dynamic neural fields on a programmable vision chip

    Martel, J. N. P., Sandamirskaya, Y. & Dudek, P., 12 Sep 2016, ICDSC 2016 - 10th International Conference on Distributed Smart Cameras. Association for Computing Machinery, Vol. 12-15-September-2016. p. 212-213

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  4. Published

    A fast self-tuning background subtraction algorithm

    Wang, B. & Dudek, P., 2014, IEEE Conference on Computer Vision and Pattern Recognition Workshops, CVPRW 2014. p. 401-404

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  5. Published

    A field programmable array core for image processing

    Walsh, D. & Dudek, P., Feb 2012, Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA'12. Association for Computing Machinery, p. 266-266

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. Published

    A general-purpose processor-per-pixel analog SIMD vision chip

    Dudek, P. & Hicks, P. J., Jan 2005, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 52, 1, p. 13-20 7 p.

    Research output: Contribution to journalArticle

  7. Published

    A general-purpose vision processor with 160×80 pixel-parallel SIMD processor array

    Lopich, A. & Dudek, P., 7 Nov 2013, Proceedings of the Custom Integrated Circuits Conference, CICC 2013. IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  8. Published

    A High-Resolution CMOS Time to Digital Converter Utilising a Vernier Delay Line

    Dudek, P., Szczepanski, S. & Hatfield, J. V., Feb 2000, In : IEEE Journal of Solid State Circuits. 35, 2, p. 240-247 8 p.

    Research output: Contribution to journalArticle

  9. Published

    A new method for fast skeletonization of binary images on cellular processor arrays

    Wang, B., Mroszczyk, P. & Dudek, P., 2014, 14th International Workshop on Cellular Nanoscale Networks and their Applications, CNNA 2014. IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  10. Published

    A processor element for a mixed signal cellular processor array vision chip

    Carey, S. J., Lopich, A. & Dudek, P., 2011, Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst. p. 1564-1567 3 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Research output: Chapter in Book/Report/Conference proceedingConference contribution