Dr Dirk Koch

Lecturer

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Publications

  1. 2018
  2. Accepted/In press

    Live Migration for OpenCL FPGA Accelerators

    Vaishnav, A., Pham, K. & Koch, D. 17 Sep 2018 (Accepted/In press) International Conference on Field-Programmable Technology (FPT). Naha, Okinawa, Japan: IEEE Xplore, 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  3. Accepted/In press

    IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs

    Pham, K., Horta, E., Koch, D., Vaishnav, A. & Kuhn, T. 12 Sep 2018 (Accepted/In press) IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-2018).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  4. Accepted/In press

    A Soft Dual-Processor System with a Partially Run-Time Reconfigurable Shared 128-Bit SIMD Engine

    Garcia Ordaz, J. R. & Koch, D. 12 Jul 2018 (Accepted/In press) The 29th IEEE International Conference on Application-specific Systems, Architectures and Processors 2018.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  5. Accepted/In press

    ZUCL: A ZYNQ UltraScale+ Framework for OpenCL HLS Applications

    Pham, K., Vaishnav, A., Vesper, M. & Koch, D. 10 Jul 2018 (Accepted/In press) Fifth International Workshop on FPGAs for Software Programmers (FSP 2018) .

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. Accepted/In press

    A Survey on FPGA Virtualization

    Vaishnav, A., Pham, K. & Koch, D. 21 May 2018 (Accepted/In press) 28th International Conference on Field Programmable Logic and Application (FPL). Dublin, Ireland, 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  7. Accepted/In press

    Resource Elastic Virtualization for FPGAs using OpenCL

    Vaishnav, A., Pham, K., Koch, D. & Garside, J. 21 May 2018 (Accepted/In press) 28th International Conference on Field Programmable Logic and Application (FPL). Dublin, Ireland, 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  8. Published

    HLS Enabled Partially Reconfigurable Module Implementation

    Grigore, B., Koch, D. & Kritikakis, C. 2018 ARCS 2018. 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  9. 2017
  10. Published

    HLS Compilation for CPU Interlays

    Garcia Ordaz, J. R. & Koch, D. 31 Dec 2017 International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2017) .

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  11. Published

    PCIeHLS: an OpenCL HLS framework

    Vesper, M., Koch, D. & Pham, K. 29 Oct 2017 Proceedings of FPGAs for Software Programmers (FSP 2017) conference.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  12. Published

    On the HLS Design of Bit-Level Operations and Custom Data Types

    Garcia Ordaz, J. R. & Koch, D. 27 Oct 2017 International Workshop on FPGAs for Software Programmers.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Research Explorer downloads

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Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Research output: Chapter in Book/Report/Conference proceedingConference contribution