Mr Anuj Vaishnav

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Publications

  1. 2020
  2. Accepted/In press

    FOS: A Modular FPGA Operating System for Dynamic Workloads

    Vaishnav, A., Pham, K., Powell, J. & Koch, D., 8 Jun 2020, (Accepted/In press) In : ACM Transactions on Reconfigurable Technology and Systems. 28 p.

    Research output: Contribution to journalArticle

  3. Accepted/In press

    A Self-Compilation Flow Demo on FOS – the FPGA Operating System

    Pham, K., Vaishnav, A., Powell, J. & Koch, D., 2020, (Accepted/In press).

    Research output: Contribution to conferenceAbstract

  4. 2019
  5. Accepted/In press

    Unexpected Diversity: Quantitative Memory Analysis for Zynq UltraScale+ Systems

    Manev, K., Vaishnav, A. & Koch, D., 7 Oct 2019, (Accepted/In press) International Conference on Field-Programmable Technology (FPT).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. Accepted/In press

    ZUCL2.0 Virtualised Memory and Communication for ZYNQ UltraScale+ FPGAs

    Pham, K., Paraskevas, K., Vaishnav, A., Attwood, A., Vesper, M. & Koch, D., 7 Aug 2019, (Accepted/In press) Sixth International Workshop on FPGAs for Software Programmers (FSP 2019). VDE Verlag

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  7. Published

    Live Migration for OpenCL FPGA Accelerators

    Vaishnav, A., Pham, K. & Koch, D., 20 Jul 2019, International Conference on Field-Programmable Technology (FPT). Naha, Okinawa, Japan: IEEE, 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  8. Published

    Heterogeneous Resource-Elastic Scheduling for CPU+FPGA Architectures

    Vaishnav, A., Pham, K. & Koch, D., 6 Jun 2019, 10th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART). ACM Digital Library

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  9. Accepted/In press

    The FOS (FPGA Operating System) Demo

    Vaishnav, A., Pham, K., Manev, K. & Koch, D., 22 May 2019, (Accepted/In press) 29th International Conference on Field Programmable Logic and Application (FPL). Barcelona, Spain

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  10. Accepted/In press

    Scalable Filtering Modules for Database Acceleration on FPGAs

    Manev, K., Vaishnav, A., Kritikakis, C. & Koch, D., 4 May 2019, (Accepted/In press) 10th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  11. Published

    ZUCL 2.0: Virtualised Memory and Communication for ZYNQ UltraScale+ FPGAs

    Pham, K., Paraskevas, K., Vaishnav, A., Attwood, A., Vesper, M. & Koch, D., 2019, FSP Workshop 2019; Sixth International Workshop on FPGAs for Software Programmers. VDE Verlag

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  12. 2018
  13. Published

    Resource Elastic Virtualization for FPGAs using OpenCL

    Vaishnav, A., Pham, K., Koch, D. & Garside, J., 6 Dec 2018, 28th International Conference on Field Programmable Logic and Application (FPL). Dublin, Ireland, 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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