Vision Chips with In-pixel Processors for High-performance Low-power Embedded Vision Systems

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We present the design of vision systems with in-pixel processors, specifically the cellular processor array architecture and implementation of the SCAMP-5 vision-chip. These sensor-processor devices provide a high-speed power-efficient solution to low-level vision processing in embedded systems. We discuss how these devices can be programmed and emulated, including a high-level domain specific language with a compiler responsible of taking care of the peculiarities of theses devices (e.g. analog errors). We discuss application examples, where such vision chips have been used to create systems that provide very low latencies and running on a low-power budget.

Bibliographical metadata

Original languageEnglish
Title of host publicationWorkshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), International Symposium on Code Generation and Optimization, CGO'16
Place of PublicationBarcelona, Spain
Number of pages3
Publication statusPublished - 12 Mar 2016