Type Information Elimination from Objects on Architectures with Tagged Pointers SupportCitation formats

TY - JOUR

T1 - Type Information Elimination from Objects on Architectures with Tagged Pointers Support

AU - Rodchenko, Andrey

AU - Kotselidis, Christos

AU - Nisbet, Andy

AU - Pop, Antoniu

AU - Luján, Mikel

PY - 2017/6/29

Y1 - 2017/6/29

N2 - Implementations of object-oriented programming languages associate type information with each object to perform various runtime tasks such as dynamic dispatch, type introspection, and reflection. A common means of storing such relation is by inserting a pointer to the associated type information into every object. Such an approach, however, introduces memory and performance overheads when compared with non-object-oriented languages. Recent 64-bit computer architectures have added support for tagged pointers by ignoring a number of bits – tag – of memory addresses during memory access operations and utilize them for other purposes; mainly security. This paper presents the first investigation into how this hardware support can be exploited by a Java Virtual Machine to remove type information from objects. Moreover, we propose novel hardware extensions to the address generation and load-store units to achieve low-overhead type information retrieval and tagged object pointers compression-decompression. The evaluation has been conducted after integrating the Maxine VM and the ZSim microarchitectural simulator. The results, across all the DaCapo benchmark suite, pseudo-SPECjbb2005, SLAMBench and GraphChi-PR executed to completion, show up to 26% and10% geometric mean heap space savings, up to 50% and 12% geometric mean dynamic DRAM energy reduction, and up to 49% and 3% geometric mean execution time reduction with no significant performance regressions.

AB - Implementations of object-oriented programming languages associate type information with each object to perform various runtime tasks such as dynamic dispatch, type introspection, and reflection. A common means of storing such relation is by inserting a pointer to the associated type information into every object. Such an approach, however, introduces memory and performance overheads when compared with non-object-oriented languages. Recent 64-bit computer architectures have added support for tagged pointers by ignoring a number of bits – tag – of memory addresses during memory access operations and utilize them for other purposes; mainly security. This paper presents the first investigation into how this hardware support can be exploited by a Java Virtual Machine to remove type information from objects. Moreover, we propose novel hardware extensions to the address generation and load-store units to achieve low-overhead type information retrieval and tagged object pointers compression-decompression. The evaluation has been conducted after integrating the Maxine VM and the ZSim microarchitectural simulator. The results, across all the DaCapo benchmark suite, pseudo-SPECjbb2005, SLAMBench and GraphChi-PR executed to completion, show up to 26% and10% geometric mean heap space savings, up to 50% and 12% geometric mean dynamic DRAM energy reduction, and up to 49% and 3% geometric mean execution time reduction with no significant performance regressions.

KW - Runtime environments, high-level language architectures, simulation.

U2 - 10.1109/TC.2017.2709739

DO - 10.1109/TC.2017.2709739

M3 - Article

VL - 67

SP - 130

EP - 143

JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

SN - 0018-9340

IS - 1

ER -