Task Graph Mapping of General Purpose Applications on a Neuromorphic PlatformCitation formats

  • Authors:
  • Indar Sugiarto
  • Pedro Campos
  • Nizar Dahir
  • Gianluca Tempesti
  • Stephen Furber

Standard

Task Graph Mapping of General Purpose Applications on a Neuromorphic Platform. / Sugiarto, Indar; Campos, Pedro; Dahir, Nizar; Tempesti, Gianluca; Furber, Stephen.

2017. Paper presented at Future Technologies Conference 2017, Vancouver, Canada.

Research output: Contribution to conferencePaperpeer-review

Harvard

Sugiarto, I, Campos, P, Dahir, N, Tempesti, G & Furber, S 2017, 'Task Graph Mapping of General Purpose Applications on a Neuromorphic Platform', Paper presented at Future Technologies Conference 2017, Vancouver, Canada, 29/11/17 - 30/11/17.

APA

Sugiarto, I., Campos, P., Dahir, N., Tempesti, G., & Furber, S. (Accepted/In press). Task Graph Mapping of General Purpose Applications on a Neuromorphic Platform. Paper presented at Future Technologies Conference 2017, Vancouver, Canada.

Vancouver

Sugiarto I, Campos P, Dahir N, Tempesti G, Furber S. Task Graph Mapping of General Purpose Applications on a Neuromorphic Platform. 2017. Paper presented at Future Technologies Conference 2017, Vancouver, Canada.

Author

Sugiarto, Indar ; Campos, Pedro ; Dahir, Nizar ; Tempesti, Gianluca ; Furber, Stephen. / Task Graph Mapping of General Purpose Applications on a Neuromorphic Platform. Paper presented at Future Technologies Conference 2017, Vancouver, Canada.9 p.

Bibtex

@conference{94a7823f66ee4a1dbbbb855f3d72153f,
title = "Task Graph Mapping of General Purpose Applications on a Neuromorphic Platform",
abstract = "A task graph is an intuitive way to represent the execution of parallel processes in many modern computing platforms. It can also be used for performance modeling and simulation in a network of computers. Common implementation of task graphs usually involves a form of message passing proto-col, which depends on a standard message passing library in the existing operating system. Not every emerging platform has such support from mainstream operating systems. For example the SpiNNaker system, which is a neuromorphic computer originally intended as a brain-style information processing system. As a massive many-core computing system, SpiNNaker not only offers abundant processing resources, but also a low-power and flexible application-oriented platform. In this paper we present an effi-cient mapping strategy for a task graph on a SpiNNaker machine. Our method relies on the existing low-level SpiNNaker{\textquoteright}s kernel that provides the direct access to the SpiNNaker elements. As a result, a fault tolerant aware task graph framework suitable for high performance computing can be achieved. The experimental results show that SpiNNaker offers very low communication latency and demonstrate that our mapping strategy is suitable for large task graph networks.",
keywords = "task graph, SpiNNaker, Neuromorphic",
author = "Indar Sugiarto and Pedro Campos and Nizar Dahir and Gianluca Tempesti and Stephen Furber",
year = "2017",
month = may,
day = "24",
language = "English",
note = "Future Technologies Conference 2017, FTC 2017 ; Conference date: 29-11-2017 Through 30-11-2017",
url = "http://saiconference.com/FTC",

}

RIS

TY - CONF

T1 - Task Graph Mapping of General Purpose Applications on a Neuromorphic Platform

AU - Sugiarto, Indar

AU - Campos, Pedro

AU - Dahir, Nizar

AU - Tempesti, Gianluca

AU - Furber, Stephen

N1 - Conference code: 41881

PY - 2017/5/24

Y1 - 2017/5/24

N2 - A task graph is an intuitive way to represent the execution of parallel processes in many modern computing platforms. It can also be used for performance modeling and simulation in a network of computers. Common implementation of task graphs usually involves a form of message passing proto-col, which depends on a standard message passing library in the existing operating system. Not every emerging platform has such support from mainstream operating systems. For example the SpiNNaker system, which is a neuromorphic computer originally intended as a brain-style information processing system. As a massive many-core computing system, SpiNNaker not only offers abundant processing resources, but also a low-power and flexible application-oriented platform. In this paper we present an effi-cient mapping strategy for a task graph on a SpiNNaker machine. Our method relies on the existing low-level SpiNNaker’s kernel that provides the direct access to the SpiNNaker elements. As a result, a fault tolerant aware task graph framework suitable for high performance computing can be achieved. The experimental results show that SpiNNaker offers very low communication latency and demonstrate that our mapping strategy is suitable for large task graph networks.

AB - A task graph is an intuitive way to represent the execution of parallel processes in many modern computing platforms. It can also be used for performance modeling and simulation in a network of computers. Common implementation of task graphs usually involves a form of message passing proto-col, which depends on a standard message passing library in the existing operating system. Not every emerging platform has such support from mainstream operating systems. For example the SpiNNaker system, which is a neuromorphic computer originally intended as a brain-style information processing system. As a massive many-core computing system, SpiNNaker not only offers abundant processing resources, but also a low-power and flexible application-oriented platform. In this paper we present an effi-cient mapping strategy for a task graph on a SpiNNaker machine. Our method relies on the existing low-level SpiNNaker’s kernel that provides the direct access to the SpiNNaker elements. As a result, a fault tolerant aware task graph framework suitable for high performance computing can be achieved. The experimental results show that SpiNNaker offers very low communication latency and demonstrate that our mapping strategy is suitable for large task graph networks.

KW - task graph

KW - SpiNNaker

KW - Neuromorphic

M3 - Paper

T2 - Future Technologies Conference 2017

Y2 - 29 November 2017 through 30 November 2017

ER -