Powerhammering through Glitch Amplification – Attacks and Mitigation
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
Abstract
Recent work on FPGA hardware security showed a substantial potential risk through power-hammering, which uses high switching activity in order to create excessive dynamic power loads. Virtually all present power-hammering attack scenarios are based on some kind of ring oscillators for which mitigation strategies exist. In this paper, we use a different strategy to create excessive dynamic power consumption: glitch amplification. By carefully designing XOR trees, fast switching wires can be implemented that, while driving high fan-out nets, can draw enough power to crash an FPGA. In addition to the attack (which is crashing an Ultra96 board), we will present a scanner for detecting malicious glitch amplifying FPGA designs.
Bibliographical metadata
Original language | English |
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Title of host publication | Proceedings - 28th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2020 |
Pages | 65-69 |
Number of pages | 5 |
ISBN (Electronic) | 9781728158037 |
DOIs | |
Publication status | Published - 1 May 2020 |
Publication series
Name | Proceedings - 28th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2020 |
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