Power management in the amulet microprocessors
Research output: Contribution to journal › Article › peer-review
Abstract
Amulet microprocessors are asynchronous (clockless) implementations of the ARM 32-bit RISC architecture. Their asynchronous control framework has positive benefits for low-power applications because it reduces activity to the minimum required to perform a task, whereas a clock inevitably incurs wasteful activity. © 2001 IEEE.
Bibliographical metadata
| Original language | English |
|---|---|
| Pages (from-to) | 42-51 |
| Number of pages | 9 |
| Journal | IEEE Design and Test of Computers |
| Volume | 18 |
| Issue number | 2 |
| DOIs | |
| Publication status | Published - Mar 2001 |