Managing a massively-parallel resource-constrained computing architecture
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
Abstract
One approach to creating a massively-parallel high-performance machine is to use large quantities of power-efficient processors, primarily due to the energy consumption of conventional high-performance computing designs. SpiNNaker is a novel high-performance architecture formed by large numbers of highly-interconnected low-power processing elements, more typically found in embedded systems. This paper presents the results of the implementation of a low-overhead management framework enabled by a universal translation layer: SpiNNmate. SpiNNmate is located between a SpiNNaker machine and the communication protocols of external applications, and we include results from a translation of the standards-based SNMP protocol to SpiNNaker. © 2012 IEEE.
Bibliographical metadata
Original language | English |
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Title of host publication | Proceedings - 15th Euromicro Conference on Digital System Design, DSD 2012|Proc. - Euromicro Conf. Digit. Syst. Des., DSD |
Pages | 723-726 |
Number of pages | 3 |
DOIs | |
Publication status | Published - 2012 |
Event | 15th Euromicro Conference on Digital System Design, DSD 2012 - Cesme, Izmir Event duration: 1 Jul 2012 → … |
Conference
Conference | 15th Euromicro Conference on Digital System Design, DSD 2012 |
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City | Cesme, Izmir |
Period | 1/07/12 → … |