First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa ArchitectureCitation formats

Standard

First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture. / Ashworth, Mike; Riley, Graham; Attwood, Andrew; Mawer, John.

H2RC 2018 : 4th Workshop on Heterogeneous High-performance Reconfigurable Computing . 2018.

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Harvard

Ashworth, M, Riley, G, Attwood, A & Mawer, J 2018, First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture. in H2RC 2018 : 4th Workshop on Heterogeneous High-performance Reconfigurable Computing .

APA

Ashworth, M., Riley, G., Attwood, A., & Mawer, J. (Accepted/In press). First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture. In H2RC 2018 : 4th Workshop on Heterogeneous High-performance Reconfigurable Computing

Vancouver

Ashworth M, Riley G, Attwood A, Mawer J. First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture. In H2RC 2018 : 4th Workshop on Heterogeneous High-performance Reconfigurable Computing . 2018

Author

Ashworth, Mike ; Riley, Graham ; Attwood, Andrew ; Mawer, John. / First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture. H2RC 2018 : 4th Workshop on Heterogeneous High-performance Reconfigurable Computing . 2018.

Bibtex

@inproceedings{b3bdbe8dd3f8407eb9a20eff675a085f,
title = "First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture",
abstract = "The EuroExa project proposes a High-Performance Computing (HPC) architecture which is both scalable to Exascale performance levels and delivers world-leading power efficiency. This is achieved through the use of low-power ARM processors accelerated by closely-coupled FPGA programmable components. In order to demonstrate the efficacy of the design, the EuroExa project includes application porting work across a rich set of applications. One such application is the new weather and climate model, LFRic (named in honour of Lewis Fry Richardson), which is being developed by the UK Met Office and its partners for operational deployment in the middle of the next decade.Much of the run-time of the LFRic model consists of compute intensive operations which are suitable for acceleration using FPGAs. Programming methods for such high-performance numerical workloads are still immature for FPGAs compared with traditional HPC architectures. The paper describes the porting of a matrix-vector kernel using the Xilinx Vivado toolset, including High-Level Synthesis (HLS), discusses the benefits of a range of optimizations and reports performance achieved on the Xilinx UltraScale+ SoC.Performance results are reported for the FPGA code and compared with single socket OpenMP performance on an Intel Broadwell CPU. We find the performance of the FPGA to be competitive when taking into account price and power consumption.",
keywords = "Exascale, FPGA, matrix-vector multiplication, Weather modeling",
author = "Mike Ashworth and Graham Riley and Andrew Attwood and John Mawer",
year = "2018",
month = oct,
day = "4",
language = "English",
booktitle = "H2RC 2018 : 4th Workshop on Heterogeneous High-performance Reconfigurable Computing",

}

RIS

TY - GEN

T1 - First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture

AU - Ashworth, Mike

AU - Riley, Graham

AU - Attwood, Andrew

AU - Mawer, John

PY - 2018/10/4

Y1 - 2018/10/4

N2 - The EuroExa project proposes a High-Performance Computing (HPC) architecture which is both scalable to Exascale performance levels and delivers world-leading power efficiency. This is achieved through the use of low-power ARM processors accelerated by closely-coupled FPGA programmable components. In order to demonstrate the efficacy of the design, the EuroExa project includes application porting work across a rich set of applications. One such application is the new weather and climate model, LFRic (named in honour of Lewis Fry Richardson), which is being developed by the UK Met Office and its partners for operational deployment in the middle of the next decade.Much of the run-time of the LFRic model consists of compute intensive operations which are suitable for acceleration using FPGAs. Programming methods for such high-performance numerical workloads are still immature for FPGAs compared with traditional HPC architectures. The paper describes the porting of a matrix-vector kernel using the Xilinx Vivado toolset, including High-Level Synthesis (HLS), discusses the benefits of a range of optimizations and reports performance achieved on the Xilinx UltraScale+ SoC.Performance results are reported for the FPGA code and compared with single socket OpenMP performance on an Intel Broadwell CPU. We find the performance of the FPGA to be competitive when taking into account price and power consumption.

AB - The EuroExa project proposes a High-Performance Computing (HPC) architecture which is both scalable to Exascale performance levels and delivers world-leading power efficiency. This is achieved through the use of low-power ARM processors accelerated by closely-coupled FPGA programmable components. In order to demonstrate the efficacy of the design, the EuroExa project includes application porting work across a rich set of applications. One such application is the new weather and climate model, LFRic (named in honour of Lewis Fry Richardson), which is being developed by the UK Met Office and its partners for operational deployment in the middle of the next decade.Much of the run-time of the LFRic model consists of compute intensive operations which are suitable for acceleration using FPGAs. Programming methods for such high-performance numerical workloads are still immature for FPGAs compared with traditional HPC architectures. The paper describes the porting of a matrix-vector kernel using the Xilinx Vivado toolset, including High-Level Synthesis (HLS), discusses the benefits of a range of optimizations and reports performance achieved on the Xilinx UltraScale+ SoC.Performance results are reported for the FPGA code and compared with single socket OpenMP performance on an Intel Broadwell CPU. We find the performance of the FPGA to be competitive when taking into account price and power consumption.

KW - Exascale

KW - FPGA

KW - matrix-vector multiplication

KW - Weather modeling

M3 - Conference contribution

BT - H2RC 2018 : 4th Workshop on Heterogeneous High-performance Reconfigurable Computing

ER -