COLAB: A Collaborative Multi-factor Scheduler for Asymmetric Multicore ProcessorsCitation formats

Standard

COLAB: A Collaborative Multi-factor Scheduler for Asymmetric Multicore Processors. / Yu, Teng; Petoumenos, Pavlos; Janjic, Vladimir; Leather, Hugh; Thomson, John.

Proceedings of the 2020 International Symposium on Code Generation and Optimization. 2019.

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Harvard

Yu, T, Petoumenos, P, Janjic, V, Leather, H & Thomson, J 2019, COLAB: A Collaborative Multi-factor Scheduler for Asymmetric Multicore Processors. in Proceedings of the 2020 International Symposium on Code Generation and Optimization.

APA

Yu, T., Petoumenos, P., Janjic, V., Leather, H., & Thomson, J. (Accepted/In press). COLAB: A Collaborative Multi-factor Scheduler for Asymmetric Multicore Processors. In Proceedings of the 2020 International Symposium on Code Generation and Optimization

Vancouver

Yu T, Petoumenos P, Janjic V, Leather H, Thomson J. COLAB: A Collaborative Multi-factor Scheduler for Asymmetric Multicore Processors. In Proceedings of the 2020 International Symposium on Code Generation and Optimization. 2019

Author

Yu, Teng ; Petoumenos, Pavlos ; Janjic, Vladimir ; Leather, Hugh ; Thomson, John. / COLAB: A Collaborative Multi-factor Scheduler for Asymmetric Multicore Processors. Proceedings of the 2020 International Symposium on Code Generation and Optimization. 2019.

Bibtex

@inproceedings{f3a29d053b8643b59b20a55798e0c933,
title = "COLAB: A Collaborative Multi-factor Scheduler for Asymmetric Multicore Processors",
abstract = "Increasingly prevalent asymmetric multicore processors (AMP) are necessary for delivering performance in the era of limited power budget and dark silicon. However, the software fails to use them efficiently. OS schedulers, in particular, handle asymmetry only under restricted scenarios. We have efficient symmetric schedulers, efficient asymmetric schedulers for single-threaded workloads, and efficient asymmetric schedulers for single program workloads. What we do not have is a scheduler that can handle all runtime factors affecting AMP for multi-hreaded multi-programmed workloads.This paper introduces the first general purpose asymmetry-aware scheduler for multi-threaded multi-programmed workloads. It estimates the performance of each thread on each type of core and identifies communication patterns and bottleneck threads. The scheduler then makes coordinated core assignment and thread selection decisions that still provide each application its fair share of the processor{\textquoteright}s time. We evaluate our approach using GEM5 simulator on four distinct big.LITTLE configurations and 26 mixed workloads composed of PARSEC and SPLASH2 benchmarks. Compared to the state-of-the art Linux CFS and AMP-aware schedulers, we demonstrate performance gains of up to 25% and 5% to 15% on average depending on the hardware setup.",
author = "Teng Yu and Pavlos Petoumenos and Vladimir Janjic and Hugh Leather and John Thomson",
year = "2019",
month = oct,
day = "23",
language = "English",
booktitle = "Proceedings of the 2020 International Symposium on Code Generation and Optimization",

}

RIS

TY - GEN

T1 - COLAB: A Collaborative Multi-factor Scheduler for Asymmetric Multicore Processors

AU - Yu, Teng

AU - Petoumenos, Pavlos

AU - Janjic, Vladimir

AU - Leather, Hugh

AU - Thomson, John

PY - 2019/10/23

Y1 - 2019/10/23

N2 - Increasingly prevalent asymmetric multicore processors (AMP) are necessary for delivering performance in the era of limited power budget and dark silicon. However, the software fails to use them efficiently. OS schedulers, in particular, handle asymmetry only under restricted scenarios. We have efficient symmetric schedulers, efficient asymmetric schedulers for single-threaded workloads, and efficient asymmetric schedulers for single program workloads. What we do not have is a scheduler that can handle all runtime factors affecting AMP for multi-hreaded multi-programmed workloads.This paper introduces the first general purpose asymmetry-aware scheduler for multi-threaded multi-programmed workloads. It estimates the performance of each thread on each type of core and identifies communication patterns and bottleneck threads. The scheduler then makes coordinated core assignment and thread selection decisions that still provide each application its fair share of the processor’s time. We evaluate our approach using GEM5 simulator on four distinct big.LITTLE configurations and 26 mixed workloads composed of PARSEC and SPLASH2 benchmarks. Compared to the state-of-the art Linux CFS and AMP-aware schedulers, we demonstrate performance gains of up to 25% and 5% to 15% on average depending on the hardware setup.

AB - Increasingly prevalent asymmetric multicore processors (AMP) are necessary for delivering performance in the era of limited power budget and dark silicon. However, the software fails to use them efficiently. OS schedulers, in particular, handle asymmetry only under restricted scenarios. We have efficient symmetric schedulers, efficient asymmetric schedulers for single-threaded workloads, and efficient asymmetric schedulers for single program workloads. What we do not have is a scheduler that can handle all runtime factors affecting AMP for multi-hreaded multi-programmed workloads.This paper introduces the first general purpose asymmetry-aware scheduler for multi-threaded multi-programmed workloads. It estimates the performance of each thread on each type of core and identifies communication patterns and bottleneck threads. The scheduler then makes coordinated core assignment and thread selection decisions that still provide each application its fair share of the processor’s time. We evaluate our approach using GEM5 simulator on four distinct big.LITTLE configurations and 26 mixed workloads composed of PARSEC and SPLASH2 benchmarks. Compared to the state-of-the art Linux CFS and AMP-aware schedulers, we demonstrate performance gains of up to 25% and 5% to 15% on average depending on the hardware setup.

M3 - Conference contribution

BT - Proceedings of the 2020 International Symposium on Code Generation and Optimization

ER -