AMULET3 revealed

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Abstract

AMULET3 is the third fully asynchronous implementation of the ARM architecture designed at the University of Manchester. It implements the most recent version of the ARM architecture (v4T), including the Thumb instruction set. Significant architectural changes from its predecessors help achieve higher performance without sacrificing the advantages of asynchronous design and some new power-saving features have been incorporated. This paper outlines the AMULET3 microprocessor core, highlighting where this design differs from its predecessors. Most notable among the changes are the use of a Han'ard architecture to increase memory bandwidth and the inclusion of a reorder buffer to handle data forwarding and memory faults. © 1999 IEEE.

Bibliographical metadata

Original languageEnglish
Title of host publicationProceedings - International Symposium on Asynchronous Circuits and Systems
PublisherIEEE Computer Society
Pages51-59
Number of pages9
ISBN (Print)0-7695-0031-5
DOIs
Publication statusPublished - 1999
Event5th International Symposium on Advanced Research in Asynchronous Circuits and Systems, ASYNC '99 - Barcelona, Spain
Event duration: 18 Apr 199922 Apr 1999
http://dblp.uni-trier.de/db/conf/async/async1999.html#LloydGG99http://dblp.uni-trier.de/rec/bibtex/conf/async/LloydGG99.xmlhttp://dblp.uni-trier.de/rec/bibtex/conf/async/LloydGG99

Conference

Conference5th International Symposium on Advanced Research in Asynchronous Circuits and Systems, ASYNC '99
CountrySpain
CityBarcelona
Period18/04/9922/04/99
Internet address