A communication infrastructure for a million processor machine

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  • External authors:
  • Andrew D. Brown
  • Jeff S. Reeve
  • Peter R. Wilson
  • Mark Zwolinski
  • John E. Chad

Abstract

SpiNNaker (Spiking Neural Network architecture) is a massively parallel computing machine, comprising a million ARM9 cores. These are realised on 50000 chips, 20 cores/chip. While it could be classed as a MIMD machine, there is no unifying bus structure, and there is no attempt to maintain cross-system memory coherence. Inter-core communication is brokered by a fast message-passing system, built in and managed at the hardware level - thus there is an inevitable tension between speed and flexibility. The message passing infrastructure was designed to be fast and have a high bandwidth; a consequence of this design decision is that the effective data payload is only 32 bits/packet. Whilst this is ample for a wide range of applications, when the system is initialising, it is necessary to transport relatively large and sophisticated data structures across the system. This can be slow and cumbersome, and makes some form of internal self-organisation extremely attractive. This is described in outline here. © 2010 author/owner(s).

Bibliographical metadata

Original languageEnglish
Title of host publicationCF 2010 - Proceedings of the 2010 Computing Frontiers Conference|CF - Proc. Comput. Front. Conf.
Place of PublicationNew York, USA
PublisherAssociation for Computing Machinery
Pages75-76
Number of pages1
ISBN (Print)9781450300445
DOIs
Publication statusPublished - 2010
Event7th ACM International Conference on Computing Frontiers, CF'10 - Bertinoro
Event duration: 1 Jul 2010 → …

Conference

Conference7th ACM International Conference on Computing Frontiers, CF'10
CityBertinoro
Period1/07/10 → …