Advanced Processor Technology

Publications

541 - 550 out of 551Page size: 10
  1. 1995
  2. Published

    Designing asynchronous sequential circuits for random pattern testability

    Petlin, O. A., Furber, S. B., Romankevich, A. M. & Groll, V. V., Jul 1995, In: IEE Proceedings: Computers and Digital Techniques. 142, 4, p. 299-305 7 p.

    Research output: Contribution to journal › Article › peer-review

    DOI: 10.1049/ip-cdt:19951982
  3. Published

    Scan testing of asynchronous sequential circuits

    Petlin, O. A. & Furber, S. B., 1995, Proceedings of the IEEE Great Lakes Symposium on VLSI|Proc IEEE Great Lakes Symp VLSI. Los Alamitos, CA, United States: IEEE, p. 224-229 5 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  4. Published

    Scan testing of micropipelines

    Petlin, O. A. & Furber, S. B., 1995, Proceedings of the IEEE VLSI Test Symposium|Proc IEEE VLSI Test Symp. IEEE Computer Society , p. 296-301 5 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  5. 1994
  6. Published

    AMULET1: A Micropipelined ARM

    Furber, S. B., Day, P., Garside, J. D., Paver, N. C. & Woods, J. V., 1994, COMPCON. p. 476-485 10 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  7. Published

    Micropipelined ARM

    Furber, S. B., Day, P., Garside, J. D., Paver, N. C. & Woods, J. V., 1994, Elsevier BV. 10 p.

    Research output: Book/Report › Book › peer-review

  8. Published

    The Design and Evaluation of an Asynchronous Microprocessor

    Furber, S. B., Day, P., Garside, J. D., Paver, N. C., Temple, S. & Woods, J. V., 1994, ICCD. IEEE Computer Society , p. 217-220 4 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  9. 1993
  10. Published

    A CMOS VLSI Implementation of an Asynchronous ALU

    Garside, J. D., Furber, S. (ed.) & Edwards, M. (ed.), 1993, Asynchronous Design Methodologies. Furber, S. B. & Edwards, M. (eds.). Elsevier BV, Vol. A-28. p. 181-192 12 p. (IFIP Transactions).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  11. Published

    A micropipelined ARM

    Furber, S. B., Day, P., Garside, J. D., Paver, N. C., Woods, J. V., Yanagawa, K. (ed.) & Ivey, P. A. (ed.), 1993, VLSI. Yanagawa, K. & Ivey, P. A. (eds.). Elsevier BV, Vol. A-42. p. 211-220 10 p. (IFIP Transactions).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  12. Published

    Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March - 2 April, 1993

    Furber, S. B. (ed.) & Edwards, M. (ed.), 1993, IFIP Transactions. Elsevier BV, Vol. A-28. (IFIP Transactions).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  13. 1992
  14. Published

    Register locking in an asynchronous microprocessor

    Paver, N. C., Day, P., Furber, S. B., Garside, J. D. & Woods, J. V., 15 Oct 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors. Cambridge, MA: IEEE, p. 351-355 5 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/ICCD.1992.276287
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