Advanced Processor Technology

Publications

  1. Article › Research › Peer-reviewed
  2. Published

    Energy Efficient Flash ADC with PVT Variability Compensation through Advanced Body Biasing

    Mroszczyk, P., Goodacre, J. & Pavlidis, V., 9 Jan 2019, In: IEEE Transactions on Circuits and Systems II: Express Briefs.

    Research output: Contribution to journalArticlepeer-review

  3. Published

    Energy-Efficient Time-Based Adaptive Encoding for Off-Chip Communication

    Maragkoudaki, E. & Pavlidis, V., 31 Aug 2020, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28, 12, p. 2551-2562 12 p., 9180343.

    Research output: Contribution to journalArticlepeer-review

  4. Published

    Engineering a thalamo-cortico-thalamic circuit on SpiNNaker: a preliminary study toward modeling sleep and wakefulness

    Bhattacharya, B. S., Patterson, C., Galluppi, F., Durrant, S. J. & Furber, S., 20 May 2014, In: Frontiers in Neural Circuits. 8, 46, p. 46 46.

    Research output: Contribution to journalArticlepeer-review

  5. Published

    Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric

    Khan, M. M., Rast, A., Navaridas Palma, J., Jin, X., Plana, L. A., Lujan, M., Temple, S., Patterson, C., Richards, D., Woods, J. V., Miguel-Alonso, J. & Furber, S., Aug 2011, In: Parallel Computing. 37, 8, p. 392-409 18 p.

    Research output: Contribution to journalArticlepeer-review

  6. Published

    Exploiting Parallelism and Vectorisation in Breadth-First Search for the Intel Xeon Phi

    Paredes Lopez, M., Riley, G. & Luján, M., 2019, In: I E E E Transactions on Parallel and Distributed Systems.

    Research output: Contribution to journalArticlepeer-review

  7. Accepted/In press

    Fabrication Cost Analysis for Contactless 3-D ICs

    Papistas, I., Velenis, D. & Pavlidis, V., 25 Mar 2019, (Accepted/In press) In: IEEE Transactions on Circuits and Systems II: Express Briefs.

    Research output: Contribution to journalArticlepeer-review

  8. Published

    Fast Predictive Handshaking in Synchronous FPGAs for Fully Asynchronous Multi-Symbol Chip Links. Application to SpiNNaker 2-of-7 Links

    Yousefzadeh, A., Plana, L. A., Temple, S., Serrano-Gotarredona, T., Furber, S. & Linares-Barranco, B., 18 Feb 2016, In: IEEE Transactions on Circuits and Systems. Part 2: Express Briefs. 63, 8, p. 763-767 5 p.

    Research output: Contribution to journalArticlepeer-review

  9. Published

    FastPath_MP: Low Overhead & Energy Efficient FPGA-based Storage Multi-Paths

    Stratikopoulos, A., Kotselidis, C., Goodacre, J. & Luján, M., 26 Nov 2020, In: ACM Transactions on Architecture and Code Optimization. 17, 4, 37.

    Research output: Contribution to journalArticlepeer-review

  10. Published

    First steps in porting the LFRic Weather and Climate model to the FPGAs of the EuroExa architecture

    Ashworth, M., Riley, G., Attwood, A. & Mawer, J., 13 Oct 2019, In: Scientific Programming.

    Research output: Contribution to journalArticlepeer-review

  11. Published

    FOS: A Modular FPGA Operating System for Dynamic Workloads

    Vaishnav, A., Pham, K., Powell, J. & Koch, D., Oct 2020, In: ACM Transactions on Reconfigurable Technology and Systems. 13, 4, 28 p., 20.

    Research output: Contribution to journalArticlepeer-review

Previous 1...3 4 5 6 7 8 9 10 ...56 Next
Return to faculty and school overview