Advanced Processor Technology
Publications
- Conference article › Research › Peer-reviewed
- Published
MU6-G. A new design to achieve mainframe performance from a mini-sized computer
Edwards, D. B. G., Knowles, A. E. & Woods, J. V., 6 May 1980, In: Proceedings - International Symposium on Computer Architecture. p. 161-167 7 p.Research output: Contribution to journal › Conference article › peer-review
- Software › Research
- Published
SpiNNaker 1M
Furber, S., Rhodes, O., Garside, J. & Lester, D., 1 Sep 2019Research output: Non-textual form › Software
- Working paper › Research
- Published
Fuse: Accurate Multiplexing of Hardware Performance Counters Across Executions
Neill, R., Drebes, A. & Pop, A., 2017, 25 p.Research output: Working paper
- Commissioned report › Research › Not peer-reviewed
- Published
Low Power Processing: Use Only the Power Needed to Get the Job Done
Goodacre, J., Dec 2008, ARM Ltd.Research output: Book/Report › Commissioned report
- Published
System Level Benchmarking Analysis of the Cortex-A9 MPCore
Goodacre, J. & Mijat, R., 2009, ARM Ltd.Research output: Book/Report › Commissioned report
- Published
Technology Preview: The ARMv8 Architecture
Goodacre, J., Nov 2011, ARM Ltd. 10 p.Research output: Book/Report › Commissioned report
- Scholarly edition › Research › Peer-reviewed
- Published
Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015)
Koch, D., Hannig, F. & Ziener, D., 1 Sep 2015, 2 ed. http://arxiv.org/html/1508.06320.Research output: Book/Report › Scholarly edition › peer-review
- Anthology › Research › Peer-reviewed
- Published
Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014)
Koch, D., Hannig, F. & Ziener, D., Sep 2014, 2014 ed. No publisher name. (FSP 2014)Research output: Book/Report › Anthology › peer-review
- Book › Research › Peer-reviewed
- Published
Micropipelined ARM
Furber, S. B., Day, P., Garside, J. D., Paver, N. C. & Woods, J. V., 1994, Elsevier BV. 10 p.Research output: Book/Report › Book › peer-review
- Published
Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014)
Koch, D., Hannig, F. & Ziener, D., 1 Sep 2014, 1 ed. http://arxiv.org/html/1408.4423. (Proceedings of the International Workshop on FPGAs for Software Programmers (FSP))Research output: Book/Report › Book › peer-review
- Book › Research › Not peer-reviewed
- Published
El algoritmo de sintonización simple de controladores difusos: (ASSCD)
Gomez-Ramirez, E., Cortes Rios, J. C., Ortiz-De-La-Vega, H. A., Melin-Olmeda, E. P. & Castillo-Lopez, O., Sep 2017, Mexico: De La Salle Ediciones. 116 p.Research output: Book/Report › Book
- Published
Flash Memory Integration: Performance and Energy Considerations
Boukhobza, J. & Olivier, P., 6 Mar 2017, ISTE Press Ltd. 266 p.Research output: Book/Report › Book
- Published
FPGAs for Software Programmers
Koch, D. (ed.), Hannig, F. (ed.) & Ziener, D. (ed.), 2016, Springer Nature. 331 p.Research output: Book/Report › Book
- Published
SpiNNaker: A spiking neural network architecture
Furber, S. (ed.) & Bogdan, P. (ed.), 31 Mar 2020, Boston-Delpht: Now Publishers Inc. 350 p.Research output: Book/Report › Book
- Patent › Research
- Published
3D Interconected Die Stack
Goodacre, A., 13 May 2020, Patent No. GB2565310A, 8 Aug 2017Research output: Patent
- Published
Multi-processing system with coherent and non-coherent modes
Goodacre, A. J. & Piry, F. C. M., 16 Jun 2009, Patent No. 7549024Research output: Patent
- Published
Outputting dynamic local content on mobile devices
Goodacre, A. J., Merrick, B. & Hitchman, D., 29 Dec 2009, Patent No. 7640491Research output: Patent
- Published
Power control within a coherent multi-processing system
Goodacre, A., Pruvost, J-A., Piry, F., Lataille, N. & Grandou, G., 30 Mar 2004Research output: Patent
- Published
System and method for real-time screening and routing of telephone calls
Goodacre, AJ. & Prisock, JH., 13 Oct 1998, Patent No. 5822416Research output: Patent
- Published
Virtualisation supporting guest operating systems using memory protection units
Goodacre, A. J., 3 Dec 2015, Patent No. US20150347052 A1, Priority date 5 Feb 2013Research output: Patent