Advanced Processor Technology

Publications

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  1. Conference article › Research › Peer-reviewed
  2. Published

    MU6-G. A new design to achieve mainframe performance from a mini-sized computer

    Edwards, D. B. G., Knowles, A. E. & Woods, J. V., 6 May 1980, In: Proceedings - International Symposium on Computer Architecture. p. 161-167 7 p.

    Research output: Contribution to journal › Conference article › peer-review

    DOI: 10.1145/800053.801921
  3. Software › Research
  4. Published

    SpiNNaker 1M

    Furber, S., Rhodes, O., Garside, J. & Lester, D., 1 Sep 2019

    Research output: Non-textual form › Software

  5. Working paper › Research
  6. Published

    Fuse: Accurate Multiplexing of Hardware Performance Counters Across Executions

    Neill, R., Drebes, A. & Pop, A., 2017, 25 p.

    Research output: Working paper

  7. Commissioned report › Research › Not peer-reviewed
  8. Published

    Low Power Processing: Use Only the Power Needed to Get the Job Done

    Goodacre, J., Dec 2008, ARM Ltd.

    Research output: Book/Report › Commissioned report

  9. Published

    System Level Benchmarking Analysis of the Cortex-A9 MPCore

    Goodacre, J. & Mijat, R., 2009, ARM Ltd.

    Research output: Book/Report › Commissioned report

  10. Published

    Technology Preview: The ARMv8 Architecture

    Goodacre, J., Nov 2011, ARM Ltd. 10 p.

    Research output: Book/Report › Commissioned report

  11. Scholarly edition › Research › Peer-reviewed
  12. Published

    Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015)

    Koch, D., Hannig, F. & Ziener, D., 1 Sep 2015, 2 ed. http://arxiv.org/html/1508.06320.

    Research output: Book/Report › Scholarly edition › peer-review

  13. Anthology › Research › Peer-reviewed
  14. Published

    Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014)

    Koch, D., Hannig, F. & Ziener, D., Sep 2014, 2014 ed. No publisher name. (FSP 2014)

    Research output: Book/Report › Anthology › peer-review

  15. Book › Research › Peer-reviewed
  16. Published

    Micropipelined ARM

    Furber, S. B., Day, P., Garside, J. D., Paver, N. C. & Woods, J. V., 1994, Elsevier BV. 10 p.

    Research output: Book/Report › Book › peer-review

  17. Published

    Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014)

    Koch, D., Hannig, F. & Ziener, D., 1 Sep 2014, 1 ed. http://arxiv.org/html/1408.4423. (Proceedings of the International Workshop on FPGAs for Software Programmers (FSP))

    Research output: Book/Report › Book › peer-review

  18. Book › Research › Not peer-reviewed
  19. Published

    El algoritmo de sintonización simple de controladores difusos: (ASSCD)

    Gomez-Ramirez, E., Cortes Rios, J. C., Ortiz-De-La-Vega, H. A., Melin-Olmeda, E. P. & Castillo-Lopez, O., Sep 2017, Mexico: De La Salle Ediciones. 116 p.

    Research output: Book/Report › Book

  20. Published

    Flash Memory Integration: Performance and Energy Considerations

    Boukhobza, J. & Olivier, P., 6 Mar 2017, ISTE Press Ltd. 266 p.

    Research output: Book/Report › Book

  21. Published

    FPGAs for Software Programmers

    Koch, D. (ed.), Hannig, F. (ed.) & Ziener, D. (ed.), 2016, Springer Nature. 331 p.

    Research output: Book/Report › Book

    DOI: 10.1007/978-3-319-26408-0
  22. Published

    SpiNNaker: A spiking neural network architecture

    Furber, S. (ed.) & Bogdan, P. (ed.), 31 Mar 2020, Boston-Delpht: Now Publishers Inc. 350 p.

    Research output: Book/Report › Book

  23. Patent › Research
  24. Published

    3D Interconected Die Stack

    Goodacre, A., 13 May 2020, Patent No. GB2565310A, 8 Aug 2017

    Research output: Patent

  25. Published

    Multi-processing system with coherent and non-coherent modes

    Goodacre, A. J. & Piry, F. C. M., 16 Jun 2009, Patent No. 7549024

    Research output: Patent

  26. Published

    Outputting dynamic local content on mobile devices

    Goodacre, A. J., Merrick, B. & Hitchman, D., 29 Dec 2009, Patent No. 7640491

    Research output: Patent

  27. Published

    Power control within a coherent multi-processing system

    Goodacre, A., Pruvost, J-A., Piry, F., Lataille, N. & Grandou, G., 30 Mar 2004

    Research output: Patent

  28. Published

    System and method for real-time screening and routing of telephone calls

    Goodacre, AJ. & Prisock, JH., 13 Oct 1998, Patent No. 5822416

    Research output: Patent

  29. Published

    Virtualisation supporting guest operating systems using memory protection units

    Goodacre, A. J., 3 Dec 2015, Patent No. US20150347052 A1, Priority date 5 Feb 2013

    Research output: Patent

  30. Abstract › Research › Peer-reviewed
  31. Accepted/In press

    A Self-Compilation Flow Demo on FOS – the FPGA Operating System

    Pham, K., Vaishnav, A., Powell, J. & Koch, D., 2020, (Accepted/In press).

    Research output: Contribution to conference › Abstract › peer-review

  32. Published

    Event-based computation: Unsupervised elementary motion decomposition

    Bogdan, P., Pineda Garcia, G., Davidson, S., Hopkins, M., James, R. & Furber, S., 2019, p. 20-23. 4 p.

    Research output: Contribution to conference › Abstract › peer-review

  33. Poster › Research › Peer-reviewed
  34. Accepted/In press

    Adaptive Transient Leakage-Aware Linearised Model for Thermal Analysis of 3-D ICs

    Pavlidis, V. & Mihajlovic, M., 8 Nov 2018, (Accepted/In press).

    Research output: Contribution to conference › Poster › peer-review

  35. Accepted/In press

    Adaptive Word Reordering for Low-Power Inter-Chip Communication

    Maragkoudaki, E., Mroszczyk, P. & Pavlidis, V., 8 Nov 2018, (Accepted/In press).

    Research output: Contribution to conference › Poster › peer-review

  36. Published

    Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems

    Höppner, S., Yan, Y., Vogginger, B., Dixius, A., Partzsch, J., Joshi, P., Neumärker, F., Hartmann, S., Schiefer, S., Scholze, S., Ellguth, G., Cederstroem, L., Eberlein, M., Mayr, C., Temple, S., Plana, L. A., Garside, J., Davidson, S., Lester, D. & Furber, S., 2017.

    Research output: Contribution to conference › Poster › peer-review

    DOI: 10.1109/ISCAS.2017.8050396
  37. Published

    Live demonstration: Ethernet communication linking two large-scale neuromorphic systems

    Partzsch, J., Mayr, C., Vogginger, B., Schuffny, R., Rast, A., Plana, L. & Furber, S., 2013.

    Research output: Contribution to conference › Poster › peer-review

    DOI: 10.1109/ECCTD.2013.6662196
  38. Published

    Live demonstration: Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems

    Yousefzadeh, A., Jabłoński, M., Iakymchuk, T., Linares-Barranco, A., Rosado, A., Plana, L. A., Serrano-Gotarredona, T., Furber, S. & Linares-Barranco, B., 2017.

    Research output: Contribution to conference › Poster › peer-review

    DOI: 10.1109/ISCAS.2017.8050408
  39. Accepted/In press

    Metal Stack and Partitioning Exploration for Monolithic 3D ICs

    Sketopoulos, N., Sotiriou, C. & Pavlidis, V., 11 May 2020, (Accepted/In press).

    Research output: Contribution to conference › Poster › peer-review

  40. Accepted/In press

    PVT-Aware Sensing and Voltage Scaling for Energy Efficient FPGAs

    Maragos, K., Lentaris, G., Soudris, D. & Pavlidis, V., 15 Nov 2018, (Accepted/In press).

    Research output: Contribution to conference › Poster › peer-review

  41. Accepted/In press

    STA Compatible Backend Design Flow for TSV-based 3-D ICs

    Kalargaris, C., Chen, Y-C. & Pavlidis, V., 5 Dec 2017, (Accepted/In press). 6 p.

    Research output: Contribution to conference › Poster › peer-review

  42. Accepted/In press

    Zero-skew Clock Network Synthesis for Monolithic 3D ICs with Minimum Wirelength

    Wang, W., Pavlidis, V. & Cheng, Y., 12 May 2020, (Accepted/In press).

    Research output: Contribution to conference › Poster › peer-review

  43. Poster › Research › Not peer-reviewed
  44. Published

    Live Demonstration: Handwritten Digit Recognition Using Spiking Deep Belief Networks on SpiNNaker

    Stromatias, E., Neil, D., Galluppi, F., Pfeiffer, M., Liu, S-C. & Furber, S., 2015.

    Research output: Contribution to conference › Poster

    DOI: 10.1109/ISCAS.2015.7169034
  45. Paper › Research › Peer-reviewed
  46. Published

    ACTiCLOUD: Enabling the Next Generation of Cloud Applications

    Goodacre, A., 17 Jul 2017.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.1109/ICDCS.2017.252
  47. Published

    Analysis of the Usage Models of System Memory Management Unit in Accelerator-attached Translation Units

    Paraskevas, K., Iordanou, K., Luján, M. & Goodacre, J., 2020. 11 p.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.1145/3422575.3422781
  48. Published

    Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip

    Mikaitis, M., Lester, D., Shang, D., Furber, S., Liu, G., Garside, J., Scholze, S., Hoppner, S. & Dixius, A., 17 Sep 2018, p. 37-44. 8 p.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.1109/ARITH.2018.8464785
  49. Accepted/In press

    Automatically Exploiting the Memory Hierarchy of GPUs through Just-in-Time Compilation

    Papadimitriou, M., Fumero Alfonso, J., Stratikopoulos, A. & Kotselidis, C-E., 16 Apr 2021, (Accepted/In press) p. 57-70. 14 p.

    Research output: Contribution to conference › Paper › peer-review

  50. Published

    BITMAN: A tool and API for FPGA bitstream manipulations

    Pham, K., Horta, E. & Koch, D., 2017.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.23919/DATE.2017.7927114
  51. Accepted/In press

    Challenges and proposals for enabling dynamic heterogeneous execution of Big Data frameworks

    Xekalaki, M., Fumero Alfonso, J. & Kotselidis, C-E., 31 Oct 2018, (Accepted/In press).

    Research output: Contribution to conference › Paper › peer-review

  52. Accepted/In press

    Cost Modeling and Analysis of TSV and Contactless 3D-ICs

    Jiang, M., Papistas, I. & Pavlidis, V., 13 May 2020, (Accepted/In press).

    Research output: Contribution to conference › Paper › peer-review

  53. Accepted/In press

    Cross-ISA Debugging in Meta-circular VMs

    Kotselidis, C., Nisbet, A., Zakkak, F. & Foutris, N., 6 Oct 2017, (Accepted/In press).

    Research output: Contribution to conference › Paper › peer-review

  54. Published

    Demystifying Crypto-Mining: Analysis and Optimizations of memory-hard PoW Algorithms

    Han, R., Foutris, N. & Kotselidis, C., 2019, p. 1-12. 12 p.

    Research output: Contribution to conference › Paper › peer-review

  55. Published

    Enabling RISC-V support on MaxineVM

    Zakkak, F., Fumero, J. & Kotselidis, C., 7 May 2018.

    Research output: Contribution to conference › Paper › peer-review

  56. Accepted/In press

    Large Utility Sorting on FPGAs

    Manev, K. & Koch, D., 16 Sep 2018, (Accepted/In press).

    Research output: Contribution to conference › Paper › peer-review

  57. Accepted/In press

    Multiple-Tasks on Multiple-Devices (MTMD): Exploiting Concurrency in Heterogeneous Managed Runtimes

    Papadimitriou, M., Markou, E., Fumero Alfonso, J., Stratikopoulos, A., Blanaru, F-G. & Kotselidis, C-E., 16 Apr 2021, (Accepted/In press) p. 125-138. 14 p.

    Research output: Contribution to conference › Paper › peer-review

  58. Published

    Objective assessment of Asthenia using energy and low-to-high spectral ratio

    Jalalinajafabadi, F., Gadepalli, C., Ghasempour, M., Ascott, F., Luján, M., Homer, J. & Cheetham, B., Jul 2015, p. 76-83.

    Research output: Contribution to conference › Paper › peer-review

  59. Published

    Optimized Task Graph Mapping on a Many-core Neuromorphic Supercomputer

    Sugiarto, I., Campos, P., Dahir, N., Tempesti, G. & Furber, S., 14 Sep 2017. 6 p.

    Research output: Contribution to conference › Paper › peer-review

  60. Published

    Paving the way towards a highly energy-efficient and highly integrated compute node for the Exascale revolution: the ExaNoDe approach

    Goodacre, A., 30 Aug 2017.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.1109/DSD.2017.37
  61. Published

    Performance Analysis for Languages Hosted on the Truffle Framework

    Gaikwad, S., Nisbet, A. & Luján, M., 2018.

    Research output: Contribution to conference › Paper › peer-review

  62. Published

    Performance Comparison of Time-Step-Driven versus Event-Driven Neural State Update Approaches in SpiNNaker

    Yousefzadeh, A., Soto, M., Serrano-gotarredona, T., Galluppi, F., Plana, L., Furber, S. & Linares-barranco, B., May 2018, p. 1-4.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.1109/ISCAS.2018.8350990
  63. Published

    Profiling a Many-core Neuromorphic Platform

    Sugiarto, I., Plana, L. A., Temple, S., Sen Bhattacharya, B., Furber, S. & Camilleri, P., 21 Sep 2017. 6 p.

    Research output: Contribution to conference › Paper › peer-review

  64. Published

    Profiling and Tracing Support for Java Applications

    Nisbet, A., Nobre, N. M., Riley, G. & Luján, M., 11 Apr 2019, p. 1. 8 p.

    Research output: Contribution to conference › Paper › peer-review

  65. Published

    Quantitative Validation of Physically Based Deformable Models in Computer Graphics

    Banks, M., Hazel, A. & Riley, G., 16 Apr 2018. 10 p.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.2312/vriphys.20181062
  66. Accepted/In press

    Running parallel bytecode interpreters on heterogeneous hardware

    Fumero Alfonso, J., Stratikopoulos, A. & Kotselidis, C-E., 2020, (Accepted/In press) p. 1-5. 5 p.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.1145/3397537.3397563
  67. Accepted/In press

    Software-defined PMC for Runtime Power Management of a Many-core Neuromorphic Platform

    Sugiarto, I., Shang, D., Singh, A. K., Ouni, B., Merrett, G., Al-Hashimi, B. & Furber, S., 2017, (Accepted/In press) p. 1-6. 6 p.

    Research output: Contribution to conference › Paper › peer-review

  68. Accepted/In press

    Task Graph Mapping of General Purpose Applications on a Neuromorphic Platform

    Sugiarto, I., Campos, P., Dahir, N., Tempesti, G. & Furber, S., 24 May 2017, (Accepted/In press). 9 p.

    Research output: Contribution to conference › Paper › peer-review

  69. Accepted/In press

    Temperature-Aware Optimization of Monolithic 3D Deep Neural Network Accelerators

    Shukla, P., Nemtzow, S., Pavlidis, V., Salman, E. & Coskun, A., 12 Sep 2020, (Accepted/In press).

    Research output: Contribution to conference › Paper › peer-review

  70. Accepted/In press

    The Case for Intra-Unikernel Isolation

    Olivier, P., Barbalace, A. & Ravindran, B., 17 Mar 2020, (Accepted/In press).

    Research output: Contribution to conference › Paper › peer-review

  71. Accepted/In press

    Transparent acceleration of Java-based deep learning engines

    Stratikopoulos, A., Olteanu, M-C., Vaughan, I., Sevarac, Z., Foutris, N., Fumero Alfonso, J. & Kotselidis, C-E., 23 Sep 2020, (Accepted/In press).

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.1145/3426182.3426188
  72. Published

    Transparent Integration of a Dynamic FPGA Database Acceleration System

    Mätas, K. & Koch, D., 13 Oct 2020.

    Research output: Contribution to conference › Paper › peer-review

    DOI: 10.1109/FPL50879.2020.00071
  73. Published

    Using Compiler Snippets to Exploit Parallelism on Heterogeneous Hardware: A Java Reduction Case Study

    Fumero Alfonso, J. & Kotselidis, C-E., 4 Nov 2018.

    Research output: Contribution to conference › Paper › peer-review

  74. Accepted/In press

    You Can’t Hide You Can’t Run: A Performance Assessment of Managed Applications on a NUMA Machine

    Papadakis, O., Zakkak, F., Foutris, N. & Kotselidis, C-E., 2020, (Accepted/In press).

    Research output: Contribution to conference › Paper › peer-review

  75. Conference contribution › Research › Peer-reviewed
  76. Published

    A binary-compatible unikernel

    Olivier, P., Chiba, D., Lankes, S., Min, C. & Ravindran, B., 1 Apr 2019, VEE 2019: Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments. Association for Computing Machinery, p. 59-73

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1145/3313808.3313817
  77. Published

    A communication infrastructure for a million processor machine

    Brown, A. D., Furber, S. B., Reeve, J. S., Wilson, P. R., Zwolinski, M., Chad, J. E., Plana, L. A. & Lester, D. R., 2010, CF 2010 - Proceedings of the 2010 Computing Frontiers Conference|CF - Proc. Comput. Front. Conf.. New York, USA: Association for Computing Machinery, p. 75-76 1 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1145/1787275.1787290
  78. Accepted/In press

    A Dynamic Adaptation Strategy for Energy-Efficient Keyframe-Based Visual SLAM

    Khalufa, A., Riley, G. & Luján, M., 5 Jun 2019, (Accepted/In press) Proceedings of the 2019 International Conference on Parallel and Distributed Processing Techniques & Applications.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  79. Published

    A forecast-based biologically-plausible STDP learning rule

    Davies, S., Rast, A., Galluppi, F. & Furber, S., 2011, Proceedings of the International Joint Conference on Neural Networks|Proc Int Jt Conf Neural Networks. USA: IEEE, p. 1810-1817 7 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/IJCNN.2011.6033444
  80. Accepted/In press

    A Framework for Software Diversification with ISA Heterogeneity

    Wang, X., Yeoh, S., Lyerly, R., Olivier, P., Kim, S-H. & Ravindran, B., 26 May 2020, (Accepted/In press) Proceedings of the 23rd International Symposium on Research in Attacks, Intrusions and Defenses (RAID).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  81. Published

    A general-purpose model translation system for a universal neural chip

    Galluppi, F., Rast, A., Davies, S. & Furber, S., 2010, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Berlin / Heidelberg: Springer Nature, Vol. 6443. p. 58-65 7 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1007/978-3-642-17537-4_8
  82. Published

    A hierachical configuration system for a massively parallel neural hardware platform

    Galluppi, F., Davies, S., Rast, A., Sharp, T., Plana, L. A. & Furber, S., 2012, CF '12 - Proceedings of the ACM Computing Frontiers Conference|CF - Proc. ACM Comput. Front. Conf.. New York, USA: Association for Computing Machinery, p. 183-192 9 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1145/2212908.2212934
  83. Published

    A location-independent direct link neuromorphic interface

    Rast, A. D., Partzsch, J., Mayr, C., Schemmel, J., Hartmann, S., Plana, L. A., Temple, S., Lester, D. R., Schuffny, R. & Furber, S., 2013, Proceedings of the International Joint Conference on Neural Networks|Proc Int Jt Conf Neural Networks. USA: IEEE

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/IJCNN.2013.6706887
  84. Published

    A novel area-efficient binary adder

    Furber, S. B. & Liu, J., 2000, Conference Record of the Asilomar Conference on Signals, Systems and Computers. Vol. 1. p. 119-123 5 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  85. Published

    A partial reconfiguration controller for Altera Stratix V FPGAs

    Xiao, Z., Koch, D. & Lujan, M., 29 Aug 2016, 26th International Conference on Field Programmable Logic and Applications (FPL): FPL 2016. IEEE Computer Society , p. 1 4 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/FPL.2016.7577349
  86. Published

    A programmable adaptive router for a GALS parallel system

    Wu, J., Furber, S. & Garside, J., 2009, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. USA: IEEE, p. 23-31 8 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/ASYNC.2009.17
  87. Published

    A real-time simulator of a biological visual system composed of a silicon retina and SpiNNaker chips

    Okuno, H., Kawasetsu, T., Plana, L. A., Furber, S. B. & Yagi, T., 22 Jan 2014, 2014 International Symposium on Artificial Life and Robotics (AROB 2014).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  88. Published

    A real-time, event-driven neuromorphic system for goal-directed attentional selection

    Galluppi, F., Brohan, K., Davidson, S., Serrano-Gotarredona, T., Carrasco, J. A. P., Linares-Barranco, B. & Furber, S., 2012, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). PART 2 ed. Vol. 7664 LNCS. p. 226-233 8 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 7664 LNCS, no. PART 2).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1007/978-3-642-34481-7_28
  89. Published

    A Robust Evolutionary Optimisation Approach for Parameterising a Neural Mass Model

    Zareian, E., Chen, J. & Sen Bhattacharya, B., Sep 2016, Artificial Neural Networks and Machine Learning – ICANN 2016: 25th International Conference on Artificial Neural Networks, Barcelona, Spain, September 6-9, 2016, Proceedings, Part II. Villa, A. E. P., Masulli, P. & Pons Rivero, A. J. (eds.). Switzerland: Springer Nature, p. 225-234 10 p. (Lecture Notes in Computer Science; vol. 9887).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1007/978-3-319-44781-0_27
  90. Published

    A Security Library for FPGA Interlays

    Vaishnav, A., Garcia Ordaz, J. R. & Koch, D., 5 Oct 2017, International Conference on Field Programmable Logic and Applications (FPL). Ghent, Belgium: IEEE

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.23919/FPL.2017.8056817
  91. Published

    A Soft Dual-Processor System with a Partially Run-Time Reconfigurable Shared 128-Bit SIMD Engine

    Garcia Ordaz, J. R. & Koch, D., 2018, The 29th IEEE International Conference on Application-specific Systems, Architectures and Processors 2018.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/asap.2018.8445115
  92. Published

    A stream-computing extension to OpenMP

    Pop, A. & Cohen, A., 2011, HiPEAC'11 - Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers|HiPEAC - Proc. Int. Conf. High Perform. Embedded Archit. Compilers. Association for Computing Machinery, p. 5-14 9 p. (HiPEAC '11).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1145/1944862.1944867
  93. Accepted/In press

    A Survey on FPGA Virtualization

    Vaishnav, A., Pham, K. & Koch, D., 21 May 2018, (Accepted/In press) 28th International Conference on Field Programmable Logic and Application (FPL). Dublin, Ireland, 8 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  94. Published

    A token-managed admission control system for QoS provision on a best-effort GALS interconnect

    Yang, S., Furber, S. B., Shi, Y. & Plana, L. A., 2009, Fundamenta Informaticae. 1 ed. IOS Press, Vol. 95. p. 53-72 19 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.3233/FI-2009-142
  95. Published

    A universal abstract-time platform for real-time neural networks

    Rast, A. D., Khan, M. M., Jin, X., Plana, L. A. & Furber, S. B., 2009, Proceedings of the International Joint Conference on Neural Networks|Proc Int Jt Conf Neural Networks. USA: IEEE, p. 2611-2618 7 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/IJCNN.2009.5179067
  96. Published

    Accelerating Linux Bash Commands on FPGAs Using Partial Reconfiguration

    Horta, E., Shen, X., Pham, K. & Koch, D., 26 Oct 2017, Proceedings of FPGAs for Software Programmers (FSP 2017) conference.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  97. Accepted/In press

    Accurate and Complete Hardware Profiling for OpenMP

    Neill, R., Drebes, A. & Pop, A., 26 May 2017, (Accepted/In press) Proceedings of the 13th International Workshop on OpenMP: Scaling OpenMP for Exascale Performance and Portability. Springer Nature, (Lecture Notes in Computer Science (LNCS)).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  98. Published

    ACTiCLOUD: Enabling the Next Generation of Cloud Applications

    Goumas, G., Nikas, K., Lakew, E. B., Kotselidis, C., Attwood, A., Elmorth, E., Flouris, M., Foutris, N., Goodacre, J., Grohmann, D., Karakostas, V., Koutsourakis, P., Kersten, M., Luján, M., Rustad, E., Thomson, J., Tomas, L., Vesterkjaer, A., Webber, J., Zhang, Y. & 1 others, Koziris, N., 2017, Proceedings of the 37th IEEE International Conference on Distributed Computing Systems (ICDCS).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/ICDCS.2017.252
  99. Published

    Active learning accelerated automatic heuristic construction for parallel program mapping

    Ogilvie, W. F., Petoumenos, P., Wang, Z. & Leather, H., 1 Aug 2014, PACT 2014 - Proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques. IEEE, p. 481-482 2 p. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1145/2628071.2628128
  100. Published

    Adaptive admission control on the SpiNNaker MPSoC

    Yang, S., Furber, S. B. & Plana, L. A., 2009, Proceedings - IEEE International SOC Conference, SOCC 2009|Proc. - IEEE Int. SOC Conf., SOCC. USA: IEEE Computer Society , p. 243-246 3 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/SOCCON.2009.5398050
  101. Published

    Advanced circuit interface for systems with multiple voltage domains

    Kalargaris, H., Goodacre, J. & Pavlidis, V. F., 22 Jul 2016, 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016. IEEE, 7519472

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/PRIME.2016.7519472
  102. Published

    Algorithm and software for simulation of spiking neural networks on the multi-chip SpiNNaker system

    Jin, X., Galluppi, F., Patterson, C., Rast, A., Davies, S., Temple, S. & Furber, S., 2010, Proceedings of the International Joint Conference on Neural Networks|Proc Int Jt Conf Neural Networks. USA: IEEE

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/IJCNN.2010.5596759
  103. Published

    Algorithm for mapping multilayer BP networks onto the SpiNNaker neuromorphic hardware

    Jin, X., Luján, M., Khan, M. M., Plana, L. A., Rast, A. D., Welbourne, S. R. & Furber, S. B., 2010, 9th International Symposium on Parallel and Distributed Computing, ISPDC 2010|Int. Symp. Parallel Distrib. Comput., ISPDC. USA: IEEE, p. 9-16 7 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/ISPDC.2010.10
  104. Published

    AMULET3: a high-performance self-timed ARM microprocessor

    Furber, S. B., Garside, J. D. & Gilbert, D. A., 1998, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. IEEE, p. 247-252 6 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  105. Published

    AMULET3 revealed

    Garside, J. D., Furber, S. B. & Chung, S. H., 1999, Proceedings - International Symposium on Asynchronous Circuits and Systems. IEEE Computer Society , p. 51-59 9 p. 761522

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/ASYNC.1999.761522
  106. Accepted/In press

    An Analysis of Call-Site Patching without Strong Hardware Support for Self-Modifying-Code

    Hartley, T., Zakkak, F., Kotselidis, C. & Luján, M., 12 Sep 2019, (Accepted/In press) Proceedings of the 16th ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes (MPLR '19). Association for Computing Machinery

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: https://doi.org/10.1145/3357390.3361027
  107. Published

    An asynchronous fully digital delay locked loop for DDR SDRAM data recovery

    Garside, J. D., Furber, S. B., Temple, S., Clark, D. M. & Plana, L. A., 2012, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. IEEE Computer Society , p. 49-56 7 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/ASYNC.2012.18
  108. Published

    An asynchronous low latency arbiter for Quality of Service (QoS) applications

    Felicijan, T., Bainbridge, W. & Furber, S., 2003, Proceedings of the International Conference on Microelectronics, ICM. IEEE, Vol. 2003-January. p. 123-126 4 p. 1287737

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/ICM.2003.238427
  109. Published

    An asynchronous on-chip network router with Quality-of-Service (QoS) support

    Felicijan, T. & Furber, S. B., 2004, Proceedings - IEEE International SOC Conference. Chickanosky, J., Ha, D. & Auletta, R. (eds.). p. 274-277 4 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  110. Published

    An efficient SpiNNaker implementation of the Neural Engineering Framework

    Mundy, A., Knight, J., Stewart, T. & Furber, S., Jul 2015, Neural Networks (IJCNN), 2015 International Joint Conference on. USA: IEEE, p. 1-8 8 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/IJCNN.2015.7280390
  111. Published

    An event-driven model for the SpiNNaker virtual synaptic channel

    Rast, A., Galluppi, F., Davies, S., Plana, L. A., Sharp, T. & Furber, S., 2011, Proceedings of the International Joint Conference on Neural Networks|Proc Int Jt Conf Neural Networks. USA: IEEE, p. 1967-1974 7 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/IJCNN.2011.6033466
  112. Published

    An on-chip and inter-chip communications network for the SpiNNaker Massively-Parallel Neural Net Simulator

    Plana, L. A., Bainbridge, J., Furber, S., Salisbury, S., Shi, Y. & Wu, J., 2008, Proceedings - Second IEEE International Symposium on Networks-on-Chip, NOCS 2008|Proc. IEEE Int. Symp. Netw. Chip NOCS. p. 215-216 1 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/NOCS.2008.4492744
  113. Published

    An Overview of Thermal Challenges and Opportunities for Monolithic 3D ICs

    Shukla, P., Coskun, A., Pavlidis, V. & Salman, E., 13 May 2019, Great Lakes Symposium on VLSI. Association for Computing Machinery

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1145/3299874.3319485
  114. Published

    Analytical assessment of the suitability of multicast communications for the SpiNNaker neuromimetic system

    Navaridas, J., Luján, M., Plana, L. A., Miguel-Alonso, J. & Furber, S. B., 2012, Proceedings of the 14th IEEE International Conference on High Performance Computing and Communications, HPCC-2012 - 9th IEEE International Conference on Embedded Software and Systems, ICESS-2012|Proc. IEEE Int. Conf. High Perform. Comput. Commun., HPCC - IEEE Int. Conf. Embedded Softw. Syst., ICESS. IEEE Computer Society , p. 1-8 7 p.

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    DOI: 10.1109/HPCC.2012.11
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