Advanced Processor Technology

Publications

  1. Published

    Creating, documenting and sharing network models

    Crook, S. M., Bednar, J. A., Berger, S., Cannon, R., Davison, A. P., Djurfeldt, M., Eppler, J., Kriener, B., Furber, S., Graham, B., Plesser, H. E., Schwabe, L., Smith, L., Steuber, V. & Van Albada, S., 2012, In: Network: Computation in Neural Systems. 23, 4, p. 131-149 18 p.

    Research output: Contribution to journalArticlepeer-review

  2. Accepted/In press

    Cross-ISA Debugging in Meta-circular VMs

    Kotselidis, C., Nisbet, A., Zakkak, F. & Foutris, N., 6 Oct 2017, (Accepted/In press).

    Research output: Contribution to conferencePaperpeer-review

  3. Published

    Cross-Language Interoperability in a Multi-Language Runtime

    Grimmer, M., Schatz, R., Seaton, C., Würthinger, T. & Luján, M., 18 Jun 2018, In: ACM Transactions on Programming Languages and Systems. 40, 2, 8.

    Research output: Contribution to journalArticlepeer-review

  4. Published

    Current status of cranial stereotactic raDiosurgery in the UK

    Dimitriadis, A., Kirkby, K. J., Nisbet, A. & Clark, C. H., 2015, In: British Journal of Radiology. 89, 1058, 20150452.

    Research output: Contribution to journalArticlepeer-review

  5. Published

    Data mining and visualisation in neuroscience applications - The CARMEN project and the signal data explorer toolset

    Jackson, T., Fletcher, M., Liang, B., Jessop, M., Davidson, S. & Austin, J., 2009, 6th International Conference on Condition Monitoring and Machinery Failure Prevention Technologies 2009. British Institute of Non-Destructive Testing, Vol. 2. p. 842-853 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  6. Published

    Deadlock Recovery in Asynchronous Networks on Chip in the Presence of Transient Faults

    Zhang, G., Garside, J., Song, W., Navaridas, J., Wang, Z. & Navaridas, J., 4 May 2015, Asynchronous Circuits and Systems (ASYNC), 2015 21st IEEE International Symposium. USA: IEEE, p. 100-107 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  7. Published

    Deep Spiking Neural Network model for time-variant signals classification: A real-time speech recognition approach

    Dominguez-Morales, J. P., Liu, Q., James, R., Gutierrez-Galan, D., Jimenez-Fernandez, A., Davidson, S. & Furber, S., 10 Oct 2018, 2018 International Joint Conference on Neural Networks, IJCNN 2018 - Proceedings. IEEE, Vol. 2018-July. 8489381

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  8. Published

    Delay insensitive system-on-chip interconnect using 1-of-4 data encoding

    Bainbridge, W. J. & Furber, S. B., 2001, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. IEEE Computer Society , p. 118-126 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  9. Published

    Delay-insensitive, point-to-point interconnect using M-of-N codes

    Bainbridge, W. J., Toms, W. B., Edwards, D. A. & Furber, S. B., 2003, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. p. 132-140 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  10. Accepted/In press

    Demo: A Closer Look at Malicious Bitstreams

    La, T., Mätas, K., Powell, J., Pham, K. & Koch, D., 2020, (Accepted/In press) 30th International Conference on Field-Programmable Logic and Applications (FPL).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  11. Published

    Demystifying Crypto-Mining: Analysis and Optimizations of memory-hard PoW Algorithms

    Han, R., Foutris, N. & Kotselidis, C., 2019, p. 1-12. 12 p.

    Research output: Contribution to conferencePaperpeer-review

  12. Published

    Design and analysis of a self-timed duplex communication system

    Yakovlev, A., Furber, S., Krenz, R. & Bystrov, A., Jul 2004, In: IEEE Transactions on Computers. 53, 7, p. 798-814 16 p.

    Research output: Contribution to journalArticlepeer-review

  13. Published

    Design Exploration of Multi-tier interconnects for Exascale systems

    Navaridas, J., Lant, J., Pascual Saiz, J., Luján, M. & Goodacre, J., 5 Aug 2019, ICPP 2019 : International Conference on Parallel Processing .

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  14. Published

    Design for testability of an asynchronous adder

    Petlin, O. A., Farnsworth, C. & Furber, S. B., 1996, In: IEE Colloquium (Digest). 40

    Research output: Contribution to journalArticlepeer-review

  15. Published

    Design Tools for Implementing Self-Aware and Fault-Tolerant Systems on FPGAs

    Beckhoff, C., Koch, D. & Torresen, J., 1 Jun 2014, In: A C M Transactions on Reconfigurable Technology and Systems. 7, 2, p. 1-23 22 p.

    Research output: Contribution to journalArticlepeer-review

  16. Published

    Designing an Exascale Interconnect using Multi-objective Optimization

    Pascual Saiz, J., Lant, J., Attwood, A., Concatto, C., Navaridas, J., Luján, M. & Goodacre, J., 2017, IEEE Congress on Evolutionary Computation 2017. IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  17. Published

    Designing asynchronous sequential circuits for random pattern testability

    Petlin, O. A., Furber, S. B., Romankevich, A. M. & Groll, V. V., Jul 1995, In: IEE Proceedings: Computers and Digital Techniques. 142, 4, p. 299-305 7 p.

    Research output: Contribution to journalArticlepeer-review

  18. Published

    Designing robust asynchronous circuit components

    Mohammadi, S., Furber, S. & Garside, J., Jun 2003, In: IEE Proceedings: Circuits, Devices and Systems. 150, 3, p. 161-166 5 p.

    Research output: Contribution to journalArticlepeer-review

  19. Accepted/In press

    DEX: Scaling Applications Beyond Machine Boundaries

    Kim, S-H., Chuang, H-R., Lyerly, R., Olivier, P., Min, C. & Ravindran, B., 13 Mar 2020, (Accepted/In press) 40th IEEE International Conference on Distributed Computing Systems (ICDCS) .

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  20. Published

    Distributed configuration of massively-parallel simulation on SpiNNaker neuromorphic hardware

    Sharp, T., Patterson, C. & Furber, S., 2011, Proceedings of the International Joint Conference on Neural Networks|Proc Int Jt Conf Neural Networks. USA: IEEE, p. 1099-1105 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

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