Advanced Processor Technology

Publications

  1. Published
  2. Published

    Towards Real-World Neurorobotics: Integrated Neuromorphic Visual Attention

    Adams, S. V., Rast, A. D., Patterson, C., Galluppi, F., Brohan, K., Pérez-Carrasco, J-A., Wennekers, T., Furber, S. & Cangelosi, A., 3 Nov 2014, 21st International Conference, ICONIP 2014, Proceedings, Part III. Springer International Publishing Switzerland: Springer Nature, Vol. 8836. p. 563-570 8 p. (Neural Information Processing, Lecture Notes in Computer Science).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  3. Published

    Towards real–world neurorobotics: Integrated neuromorphic visual attention

    Adams, S. V., Rast, A. D., Patterson, C., Galluppi, F., Brohan, K., Pérez-Carrasco, J. A., Wennekers, T., Furber, S. & Cangelosi, A., 2014, Neural Information Processing - 21st International Conference, ICONIP 2014, Proceedings. Springer Nature, Vol. 8836. p. 563-570 8 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 8836).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  4. E-pub ahead of print

    An effective, secure and efficient tagging method for integrity protection of outsourced data in a public cloud storage

    Almarwani, R., Zhang, N. & Garside, J., 5 Nov 2020, In: PLoS ONE. 15, 11, p. e0241236

    Research output: Contribution to journalArticlepeer-review

  5. Published

    Low latency network and distributed storage for next generation HPC systems: The ExaNeSt project

    Ammendola, R., Biagioni, A., Cretaro, P., Frezza, O., Lo Cicero, F., Lonardo, A., Martinelli, M., Paolucci, P. S., Pastorelli, E., Pisani, F., Simula, F., Vicini, P., Navaridas, J., Chaix, F., Chrysos, N., Katevenis, M. & Papaeustathiou, V., 23 Nov 2017, In: Journal of Physics: Conference Series. 898, 8, 082045.

    Research output: Contribution to journalArticlepeer-review

  6. Published

    The Next Generation of Exascale-Class Systems: The ExaNeSt Project

    Ammendola, R., Biagioni, A., Cretaro, P., Frezza, O., Lo Cicero, F., Lonardo, A., Martinelli, M., Paolucci, P. S., Pastorelli, E., Simula, F., Vicini, P., Taffoni, G., Pascual, J. A., Navaridas, J., Luján, M., Goodacree, J., Chrysos, N. & Katevenis, M., 25 Sep 2017, Proceedings - 20th Euromicro Conference on Digital System Design, DSD 2017. Novotny, M., Kubatova, H. & Skavhaug, A. (eds.). IEEE, p. 510-515 6 p. 8049832

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  7. Published

    Efficient Linear System Solution Techniques in the Simulation of Large Dense Mutually Inductive Circuits

    Antoniadis, C., Mihajlovic, M., Evmorfopoulos, N., Stamoulis, G. & Pavlidis, V., 10 Feb 2020, Proceedings - 2019 IEEE International Conference on Computer Design, ICCD 2019. p. 405-408 4 p. 8988760. (Proceedings - 2019 IEEE International Conference on Computer Design, ICCD 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  8. Accepted/In press

    First steps in Porting the LFRic Weather and Climate Model to the FPGAs of the EuroExa Architecture

    Ashworth, M., Riley, G., Attwood, A. & Mawer, J., 4 Oct 2018, (Accepted/In press) H2RC 2018 : 4th Workshop on Heterogeneous High-performance Reconfigurable Computing .

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  9. Published

    Prospects for Low-power Acceleration of HPC Workloads in EuroExa: FPGA Acceleration of a Numerical Weather Forecast Code

    Ashworth, M., Riley, G., Attwood, A. & Mawer, J., 15 May 2019, Proceedings of the 2019 Emerging Technology Conference. Bane, M. K. & Holmes, V. (eds.). EMiT, University of Huddersfield, High End Compute Ltd and University of Manchester, p. 12-15

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  10. Published

    Early application performance at the hartree centre with the openPOWER architecture

    Ashworth, M., Meng, J., Novakovic, V. & Siso, S., 1 Jan 2016, High Performance Computing - ISC High Performance 2016 International Workshops ExaComm, E-MuCoCoS, HPC-IODC, IXPUG, IWOPH, P^3MA, VHPC, WOPSSS, Revised Selected. Mohr, B., Kunkel, J. M. & Taufer, M. (eds.). Springer Nature, p. 173-187 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 9945 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  11. Published

    First steps in porting the LFRic Weather and Climate model to the FPGAs of the EuroExa architecture

    Ashworth, M., Riley, G., Attwood, A. & Mawer, J., 13 Oct 2019, In: Scientific Programming.

    Research output: Contribution to journalArticlepeer-review

  12. Published

    Delay-insensitive, point-to-point interconnect using M-of-N codes

    Bainbridge, W. J., Toms, W. B., Edwards, D. A. & Furber, S. B., 2003, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. p. 132-140 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  13. Published

    The Design and Test of a Smartcard Chip Using a CHAIN Self-Timed Network-on-Chip

    Bainbridge, W. J., Plana, L. A. & Furber, S. B., Feb 2004, Proceedings - Design, Automation and Test in Europe Conference and Exhibition. Lindwer, M., Gerousis, V. & Fifueras, J. (eds.). IEEE Computer Society , Vol. 3. p. 274-279 6 p. 1269249

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  14. Published

    Delay insensitive system-on-chip interconnect using 1-of-4 data encoding

    Bainbridge, W. J. & Furber, S. B., 2001, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. IEEE Computer Society , p. 118-126 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  15. Published

    Chain: A delay-insensitive chip area interconnect

    Bainbridge, J. & Furber, S., Sep 2002, In: IEEE Micro. 22, 5, p. 16-23 7 p.

    Research output: Contribution to journalArticlepeer-review

  16. Published

    Asynchronous Macrocell Interconnect using MARBLE

    Bainbridge, W. J. & Furber, S. B., 1998, ASYNC. IEEE Computer Society , p. 122-132 11 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  17. Published

    MARBLE: An asynchronous on-chip macrocell bus

    Bainbridge, W. J. & Furber, S. B., 1 Aug 2000, In: Microprocessors and Microsystems. 24, 4, p. 213-222 10 p.

    Research output: Contribution to journalArticlepeer-review

  18. Published

    Keynotes

    Bal, H., Blake, W., Goodacre, J. & Flynn, M., 22 Oct 2014, host publication. IEEE, p. xviii-xxii

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

  19. Published

    Self-timed section-carry based carry lookahead adders and the concept of alias logic

    Balasubramanian, P., Edwards, D. A. & Toms, W. B., 12 Apr 2013, In: Journal of Circuits, Systems and Computers. 22, 4, 1350028.

    Research output: Contribution to journalArticlepeer-review

  20. Published

    Quantitative Validation of Physically Based Deformable Models in Computer Graphics

    Banks, M., Hazel, A. & Riley, G., 16 Apr 2018. 10 p.

    Research output: Contribution to conferencePaperpeer-review

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